/* File pwr_otherioclasses.hpp.
*
* Generated by co_convert V6.1.0 26-MAY-2023 15:11:27.17.
* Do not edit this file.
*
* Contains type and struct declarations for the types and classes
* in volume OtherIO.
*/
#ifndef pwr_otherioclasses_hpp
#define pwr_otherioclasses_hpp
#ifndef pwr_class_h
#include "pwr_class.h"
#endif
#ifndef pwr_systemclasses_h
#include "pwr_systemclasses.h"
#endif
MotionControl_StatusEnum
typedef pwr_tEnum pwr_tMotionControl_StatusEnum;
typedef enum {
pwr_eMotionControl_StatusEnum_Success = 0,
pwr_eMotionControl_StatusEnum_FindDevice = 1,
pwr_eMotionControl_StatusEnum_ConnectDevice = 2,
pwr_eMotionControl_StatusEnum_NotConnected = 8,
pwr_eMotionControl_StatusEnum_Write = 10,
pwr_eMotionControl_StatusEnum_WriteFind = 11,
pwr_eMotionControl_StatusEnum_Read = 12,
pwr_eMotionControl_StatusEnum_ReadTimeout = 13,
pwr_eMotionControl_StatusEnum_CommandReply = 14,
pwr_eMotionControl_StatusEnum_Command = 15,
pwr_eMotionControl_StatusEnum_Parameter = 16,
pwr_eMotionControl_StatusEnum_Function = 17,
pwr_eMotionControl_StatusEnum_NotActivated = 18,
pwr_eMotionControl_StatusEnum_Checksum = 19,
pwr_eMotionControl_StatusEnum_SPI = 21,
pwr_eMotionControl_StatusEnum_ADSwitch = 22,
pwr_eMotionControl_StatusEnum_Hardware = 23,
pwr_eMotionControl_StatusEnum_Unknown = 30,
} pwr_eMotionControl_StatusEnum;
Modbus_FCEnum
typedef pwr_tEnum pwr_tModbus_FCEnum;
typedef enum {
pwr_eModbus_FCEnum_ReadCoils = 1,
pwr_eModbus_FCEnum_ReadDiscreteInputs = 2,
pwr_eModbus_FCEnum_ReadHoldingRegisters = 3,
pwr_eModbus_FCEnum_ReadInputRegisters = 4,
pwr_eModbus_FCEnum_WriteSingleCoil = 5,
pwr_eModbus_FCEnum_WriteSingleRegister = 6,
pwr_eModbus_FCEnum_WriteMultipleCoils = 15,
pwr_eModbus_FCEnum_WriteMultipleRegisters = 16,
} pwr_eModbus_FCEnum;
ModbusModule_StatusEnum
typedef pwr_tEnum pwr_tModbusModule_StatusEnum;
typedef enum {
pwr_eModbusModule_StatusEnum_OK = 0,
pwr_eModbusModule_StatusEnum_IllegalFunction = 1,
pwr_eModbusModule_StatusEnum_IllegalDataAddress = 2,
pwr_eModbusModule_StatusEnum_IllegalDataValue = 3,
pwr_eModbusModule_StatusEnum_SlaveServiceFailure = 4,
pwr_eModbusModule_StatusEnum_StatusUnknown = 5,
} pwr_eModbusModule_StatusEnum;
ModbusSever_StatusEnum
typedef pwr_tEnum pwr_tModbusSever_StatusEnum;
typedef enum {
pwr_eModbusSever_StatusEnum_OK = 0,
pwr_eModbusSever_StatusEnum_IllegalFunctionCode = 1,
pwr_eModbusSever_StatusEnum_IllegalDataAddress = 2,
pwr_eModbusSever_StatusEnum_IllegalDataValue = 3,
pwr_eModbusSever_StatusEnum_ServerFailure = 4,
pwr_eModbusSever_StatusEnum_Acknowledge = 5,
pwr_eModbusSever_StatusEnum_SeverBusy = 6,
} pwr_eModbusSever_StatusEnum;
Modbus_DisableEnum
typedef pwr_tEnum pwr_tModbus_DisableEnum;
typedef enum {
pwr_eModbus_DisableEnum_No = 0,
pwr_eModbus_DisableEnum_Disable = 1,
pwr_eModbus_DisableEnum_Close = 2,
} pwr_eModbus_DisableEnum;
Arduino_StatusEnum
typedef pwr_tEnum pwr_tArduino_StatusEnum;
typedef enum {
pwr_eArduino_StatusEnum_Success = 1,
pwr_eArduino_StatusEnum_DiConfigureError = 2,
pwr_eArduino_StatusEnum_DoConfigureError = 4,
pwr_eArduino_StatusEnum_AiConfigureError = 6,
pwr_eArduino_StatusEnum_AoConfigureError = 8,
pwr_eArduino_StatusEnum_CommError = 10,
pwr_eArduino_StatusEnum_MsgSize = 12,
pwr_eArduino_StatusEnum_NoMessage = 14,
pwr_eArduino_StatusEnum_ChecksumError = 16,
pwr_eArduino_StatusEnum_NoSuchDevice = 18,
pwr_eArduino_StatusEnum_DeviceSetupError = 20,
pwr_eArduino_StatusEnum_ConnectionTimeout = 22,
} pwr_eArduino_StatusEnum;
Arduino_BaudRateEnum
typedef pwr_tEnum pwr_tArduino_BaudRateEnum;
typedef enum {
pwr_eArduino_BaudRateEnum_BaudRate_2400 = 2400,
pwr_eArduino_BaudRateEnum_BaudRate_4800 = 4800,
pwr_eArduino_BaudRateEnum_BaudRate_9600 = 9600,
pwr_eArduino_BaudRateEnum_BaudRate_14400 = 14400,
pwr_eArduino_BaudRateEnum_BaudRate_19200 = 19200,
pwr_eArduino_BaudRateEnum_BaudRate_28800 = 28800,
pwr_eArduino_BaudRateEnum_BaudRate_38400 = 38400,
pwr_eArduino_BaudRateEnum_BaudRate_57600 = 57600,
pwr_eArduino_BaudRateEnum_BaudRate_115200 = 115200,
} pwr_eArduino_BaudRateEnum;
Arduino_OptionsMask
typedef pwr_tMask pwr_tArduino_OptionsMask;
typedef enum {
pwr_mArduino_OptionsMask_OptimizedDiPoll = 1UL,
pwr_mArduino_OptionsMask_ConnectionRequest = 2UL,
pwr_mArduino_OptionsMask_Ao16Bit = 4UL,
pwr_mArduino_OptionsMask_Checksum = 8UL,
pwr_mArduino_OptionsMask_SerialPort = 16UL,
} pwr_mArduino_OptionsMask;
Hilscher_cifX_CommStateEnum
typedef pwr_tEnum pwr_tHilscher_cifX_CommStateEnum;
typedef enum {
pwr_eHilscher_cifX_CommStateEnum_Unknown = 0,
pwr_eHilscher_cifX_CommStateEnum_Offline = 1,
pwr_eHilscher_cifX_CommStateEnum_Stop = 2,
pwr_eHilscher_cifX_CommStateEnum_Idle = 3,
pwr_eHilscher_cifX_CommStateEnum_Operate = 4,
} pwr_eHilscher_cifX_CommStateEnum;
Hilscher_cifX_SlaveStateEnum
typedef pwr_tEnum pwr_tHilscher_cifX_SlaveStateEnum;
typedef enum {
pwr_eHilscher_cifX_SlaveStateEnum_Undefined = 0,
pwr_eHilscher_cifX_SlaveStateEnum_Ok = 1,
pwr_eHilscher_cifX_SlaveStateEnum_Failed = 2,
pwr_eHilscher_cifX_SlaveStateEnum_Warning = 3,
} pwr_eHilscher_cifX_SlaveStateEnum;
SPI_ModeEnum
typedef pwr_tEnum pwr_tSPI_ModeEnum;
typedef enum {
pwr_eSPI_ModeEnum_Mode0 = 0,
pwr_eSPI_ModeEnum_Mode1 = 1,
pwr_eSPI_ModeEnum_Mode2 = 2,
pwr_eSPI_ModeEnum_Mode3 = 3,
} pwr_eSPI_ModeEnum;
Nodave_ConnectionEnum
typedef pwr_tEnum pwr_tNodave_ConnectionEnum;
typedef enum {
pwr_eNodave_ConnectionEnum_Serial = 0,
pwr_eNodave_ConnectionEnum_TCP = 1,
} pwr_eNodave_ConnectionEnum;
Nodave_ProtocolEnum
typedef pwr_tEnum pwr_tNodave_ProtocolEnum;
typedef enum {
pwr_eNodave_ProtocolEnum_MPI = 0,
pwr_eNodave_ProtocolEnum_MPI2 = 1,
pwr_eNodave_ProtocolEnum_MPI3 = 2,
pwr_eNodave_ProtocolEnum_MPI4 = 3,
pwr_eNodave_ProtocolEnum_PPI = 10,
pwr_eNodave_ProtocolEnum_AS511 = 20,
pwr_eNodave_ProtocolEnum_S7online = 50,
pwr_eNodave_ProtocolEnum_ISOTCP = 122,
pwr_eNodave_ProtocolEnum_ISOTCP243 = 123,
pwr_eNodave_ProtocolEnum_ISOTCPR = 124,
pwr_eNodave_ProtocolEnum_MPI_IBH = 223,
pwr_eNodave_ProtocolEnum_PPI_IBH = 224,
pwr_eNodave_ProtocolEnum_NLpro = 230,
pwr_eNodave_ProtocolEnum_UserTransport = 255,
} pwr_eNodave_ProtocolEnum;
Nodave_SpeedEnum
typedef pwr_tEnum pwr_tNodave_SpeedEnum;
typedef enum {
pwr_eNodave_SpeedEnum_9k = 0,
pwr_eNodave_SpeedEnum_19k = 1,
pwr_eNodave_SpeedEnum_187k = 2,
pwr_eNodave_SpeedEnum_500k = 3,
pwr_eNodave_SpeedEnum_1500k = 4,
pwr_eNodave_SpeedEnum_45k = 5,
pwr_eNodave_SpeedEnum_93k = 6,
} pwr_eNodave_SpeedEnum;
Nodave_AreaEnum
typedef pwr_tEnum pwr_tNodave_AreaEnum;
typedef enum {
pwr_eNodave_AreaEnum_SysInfo = 3,
pwr_eNodave_AreaEnum_SysFlags = 5,
pwr_eNodave_AreaEnum_AnaIn = 6,
pwr_eNodave_AreaEnum_AnaOut = 7,
pwr_eNodave_AreaEnum_P = 128,
pwr_eNodave_AreaEnum_Inputs = 129,
pwr_eNodave_AreaEnum_Outputs = 130,
pwr_eNodave_AreaEnum_Flags = 131,
pwr_eNodave_AreaEnum_DB = 132,
pwr_eNodave_AreaEnum_DI = 133,
pwr_eNodave_AreaEnum_Local = 134,
pwr_eNodave_AreaEnum_V = 135,
pwr_eNodave_AreaEnum_Counter = 28,
pwr_eNodave_AreaEnum_Timer = 29,
pwr_eNodave_AreaEnum_Counter200 = 30,
pwr_eNodave_AreaEnum_Timer200 = 31,
pwr_eNodave_AreaEnum_RawMemory = 0,
} pwr_eNodave_AreaEnum;
EplStatusEnum
typedef pwr_tEnum pwr_tEplStatusEnum;
typedef enum {
pwr_eEplStatusEnum_EplSuccessful = 0,
pwr_eEplStatusEnum_EplIllegalInstance = 1,
pwr_eEplStatusEnum_EplInvalidInstanceParam = 2,
pwr_eEplStatusEnum_EplNoFreeInstance = 3,
pwr_eEplStatusEnum_EplWrongSignature = 4,
pwr_eEplStatusEnum_EplInvalidOperation = 5,
pwr_eEplStatusEnum_EplInvalidNodeId = 7,
pwr_eEplStatusEnum_EplNoResource = 8,
pwr_eEplStatusEnum_EplShutdown = 9,
pwr_eEplStatusEnum_EplReject = 10,
pwr_eEplStatusEnum_EplRetry = 11,
pwr_eEplStatusEnum_EplInvalidEvent = 12,
pwr_eEplStatusEnum_EplEdrvNoFreeTxDesc = 17,
pwr_eEplStatusEnum_EplEdrvInvalidCycleLen = 18,
pwr_eEplStatusEnum_EplEdrvInitError = 19,
pwr_eEplStatusEnum_EplEdrvNoFreeBufEntry = 20,
pwr_eEplStatusEnum_EplEdrvBufNotExisting = 21,
pwr_eEplStatusEnum_EplEdrvInvalidRxBuf = 22,
pwr_eEplStatusEnum_EplEdrvInvalidParam = 28,
pwr_eEplStatusEnum_EplEdrvNextTxListNotEmpty = 29,
pwr_eEplStatusEnum_EplEdrvCurTxListEmpty = 30,
pwr_eEplStatusEnum_EplEdrvTxListNotFinishedYet = 31,
pwr_eEplStatusEnum_EplDllOutOfMemory = 33,
pwr_eEplStatusEnum_EplDllIllegalHdl = 34,
pwr_eEplStatusEnum_EplDllCbAsyncRegistered = 35,
pwr_eEplStatusEnum_EplDllAsyncSyncReqFull = 36,
pwr_eEplStatusEnum_EplDllAsyncTxBufferEmpty = 37,
pwr_eEplStatusEnum_EplDllAsyncTxBufferFull = 38,
pwr_eEplStatusEnum_EplDllNoNodeInfo = 39,
pwr_eEplStatusEnum_EplDllInvalidParam = 40,
pwr_eEplStatusEnum_EplDllInvalidAsndServiceId = 41,
pwr_eEplStatusEnum_EplDllTxBufNotReady = 46,
pwr_eEplStatusEnum_EplDllTxFrameInvalid = 47,
pwr_eEplStatusEnum_EplObdIllegalPart = 48,
pwr_eEplStatusEnum_EplObdIndexNotExist = 49,
pwr_eEplStatusEnum_EplObdSubindexNotExist = 50,
pwr_eEplStatusEnum_EplObdReadViolation = 51,
pwr_eEplStatusEnum_EplObdWriteViolation = 52,
pwr_eEplStatusEnum_EplObdAccessViolation = 53,
pwr_eEplStatusEnum_EplObdUnknownObjectType = 54,
pwr_eEplStatusEnum_EplObdVarEntryNotExist = 55,
pwr_eEplStatusEnum_EplObdValueTooLow = 56,
pwr_eEplStatusEnum_EplObdValueTooHigh = 57,
pwr_eEplStatusEnum_EplObdValueLengthError = 58,
pwr_eEplStatusEnum_EplObdErrnoSet = 59,
pwr_eEplStatusEnum_EplObdInvalidDcf = 60,
pwr_eEplStatusEnum_EplObdOutOfMemory = 61,
pwr_eEplStatusEnum_EplObdNoConfigData = 62,
pwr_eEplStatusEnum_EplNmtUnknownCommand = 64,
pwr_eEplStatusEnum_EplNmtInvalidFramePointer = 65,
pwr_eEplStatusEnum_EplNmtInvalidEvent = 66,
pwr_eEplStatusEnum_EplNmtInvalidState = 67,
pwr_eEplStatusEnum_EplNmtInvalidParam = 68,
pwr_eEplStatusEnum_EplNmtSyncReqRejected = 69,
pwr_eEplStatusEnum_EplSdoUdpMissCb = 80,
pwr_eEplStatusEnum_EplSdoUdpNoSocket = 81,
pwr_eEplStatusEnum_EplSdoUdpSocketError = 82,
pwr_eEplStatusEnum_EplSdoUdpThreadError = 83,
pwr_eEplStatusEnum_EplSdoUdpNoFreeHandle = 84,
pwr_eEplStatusEnum_EplSdoUdpSendError = 85,
pwr_eEplStatusEnum_EplSdoUdpInvalidHdl = 86,
pwr_eEplStatusEnum_EplSdoSeqMissCb = 96,
pwr_eEplStatusEnum_EplSdoSeqNoFreeHandle = 97,
pwr_eEplStatusEnum_EplSdoSeqInvalidHdl = 98,
pwr_eEplStatusEnum_EplSdoSeqUnsupportedProt = 99,
pwr_eEplStatusEnum_EplSdoSeqNoFreeHistory = 100,
pwr_eEplStatusEnum_EplSdoSeqFrameSizeError = 101,
pwr_eEplStatusEnum_EplSdoSeqRequestAckNeeded = 102,
pwr_eEplStatusEnum_EplSdoSeqInvalidFrame = 103,
pwr_eEplStatusEnum_EplSdoSeqConnectionBusy = 104,
pwr_eEplStatusEnum_EplSdoSeqInvalidEvent = 105,
pwr_eEplStatusEnum_EplSdoComUnsupportedProt = 112,
pwr_eEplStatusEnum_EplSdoComNoFreeHandle = 113,
pwr_eEplStatusEnum_EplSdoComInvalidServiceType = 114,
pwr_eEplStatusEnum_EplSdoComInvalidHandle = 115,
pwr_eEplStatusEnum_EplSdoComInvalidSendType = 116,
pwr_eEplStatusEnum_EplSdoComNotResponsible = 117,
pwr_eEplStatusEnum_EplSdoComHandleExists = 118,
pwr_eEplStatusEnum_EplSdoComHandleBusy = 119,
pwr_eEplStatusEnum_EplSdoComInvalidParam = 120,
pwr_eEplStatusEnum_EplEventUnknownSink = 128,
pwr_eEplStatusEnum_EplEventPostError = 129,
pwr_eEplStatusEnum_EplEventReadError = 130,
pwr_eEplStatusEnum_EplEventWrongSize = 131,
pwr_eEplStatusEnum_EplTimerInvalidHandle = 144,
pwr_eEplStatusEnum_EplTimerNoTimerCreated = 145,
pwr_eEplStatusEnum_EplTimerThreadError = 146,
pwr_eEplStatusEnum_EplSdoAsndInvalidNodeId = 160,
pwr_eEplStatusEnum_EplSdoAsndNoFreeHandle = 161,
pwr_eEplStatusEnum_EplSdoAsndInvalidHandle = 162,
pwr_eEplStatusEnum_EplPdoNotExist = 176,
pwr_eEplStatusEnum_EplPdoLengthExceeded = 177,
pwr_eEplStatusEnum_EplPdoGranularityMismatch = 178,
pwr_eEplStatusEnum_EplPdoInitError = 179,
pwr_eEplStatusEnum_EplPdoConfWhileEnabled = 183,
pwr_eEplStatusEnum_EplPdoErrorMapp = 184,
pwr_eEplStatusEnum_EplPdoVarNotFound = 185,
pwr_eEplStatusEnum_EplPdoVarNotMappable = 186,
pwr_eEplStatusEnum_EplPdoSizeMismatch = 188,
pwr_eEplStatusEnum_EplPdoTooManyTxPdos = 189,
pwr_eEplStatusEnum_EplPdoInvalidObjIndex = 190,
pwr_eEplStatusEnum_EplPdoTooManyPdos = 191,
pwr_eEplStatusEnum_EplCfmConfigError = 192,
pwr_eEplStatusEnum_EplCfmSdocTimeOutError = 193,
pwr_eEplStatusEnum_EplCfmInvalidDcf = 194,
pwr_eEplStatusEnum_EplCfmUnsupportedDcf = 195,
pwr_eEplStatusEnum_EplCfmConfigWithErrors = 196,
pwr_eEplStatusEnum_EplCfmNoFreeConfig = 197,
pwr_eEplStatusEnum_EplCfmNoConfigData = 198,
pwr_eEplStatusEnum_EplCfmUnsuppDatatypeDcf = 199,
pwr_eEplStatusEnum_EplApiTaskDeferred = 320,
pwr_eEplStatusEnum_EplApiInvalidParam = 322,
pwr_eEplStatusEnum_EplApiNoObdInitRam = 323,
pwr_eEplStatusEnum_EplApiSdoBusyIntern = 324,
pwr_eEplStatusEnum_EplApiPIAlreadyAllocated = 325,
pwr_eEplStatusEnum_EplApiPIOutOfMemory = 326,
pwr_eEplStatusEnum_EplApiPISizeExceeded = 327,
pwr_eEplStatusEnum_EplApiPINotAllocated = 328,
pwr_eEplStatusEnum_EplApiPIJobQueueFull = 329,
pwr_eEplStatusEnum_EplApiPIJobQueueEmpty = 330,
pwr_eEplStatusEnum_EplApiPIInvalidJobSize = 331,
pwr_eEplStatusEnum_EplApiPIInvalidPIPointer = 332,
pwr_eEplStatusEnum_EplApiPINonBlockingNotSupp = 333,
} pwr_eEplStatusEnum;
EplNmtState
typedef pwr_tEnum pwr_tEplNmtState;
typedef enum {
pwr_eEplNmtState_EplNmtGsOff = 0,
pwr_eEplNmtState_EplNmtGsInitialising = 25,
pwr_eEplNmtState_EplNmtGsResetApplication = 41,
pwr_eEplNmtState_EplNmtGsResetCommunication = 57,
pwr_eEplNmtState_EplNmtGsResetConfiguration = 121,
pwr_eEplNmtState_EplNmtCsNotActive = 284,
pwr_eEplNmtState_EplNmtCsPreOperational1 = 285,
pwr_eEplNmtState_EplNmtCsStopped = 333,
pwr_eEplNmtState_EplNmtCsPreOperational2 = 349,
pwr_eEplNmtState_EplNmtCsReadyToOperate = 365,
pwr_eEplNmtState_EplNmtCsOperational = 509,
pwr_eEplNmtState_EplNmtCsBasicEthernet = 286,
pwr_eEplNmtState_EplNmtMsNotActive = 540,
pwr_eEplNmtState_EplNmtMsPreOperational1 = 541,
pwr_eEplNmtState_EplNmtMsPreOperational2 = 605,
pwr_eEplNmtState_EplNmtMsReadyToOperate = 621,
pwr_eEplNmtState_EplNmtMsOperational = 765,
pwr_eEplNmtState_EplNmtMsBasicEthernet = 542,
} pwr_eEplNmtState;
MQTT_MsgFormat
typedef pwr_tEnum pwr_tMQTT_MsgFormat;
typedef enum {
pwr_eMQTT_MsgFormat_String = 0,
pwr_eMQTT_MsgFormat_JSON = 1,
} pwr_eMQTT_MsgFormat;
#ifndef pwr_cClass_MotionControl_USB
#define pwr_cClass_MotionControl_USB 4194959368UL
#endif
pwr_Class_MotionControl_USB
class pwr_Class_MotionControl_USB {
public:
pwr_tString80 Description pwr_dAlignLW;
pwr_tIoProcessMask Process pwr_dAlignW;
pwr_tObjid ThreadObject pwr_dAlignW;
pwr_tMotionControl_StatusEnum Status pwr_dAlignW;
};
#ifndef pwr_cClass_MotionControl_USBIO
#define pwr_cClass_MotionControl_USBIO 4194959376UL
#endif
pwr_Class_MotionControl_USBIO
class pwr_Class_MotionControl_USBIO : public pwr_Class_BaseIOCard {
public:
pwr_tMotionControl_StatusEnum Status pwr_dAlignLW;
pwr_tFloat32 WatchdogTime pwr_dAlignW;
};
#ifndef pwr_cClass_Modbus_TCP_Slave
#define pwr_cClass_Modbus_TCP_Slave 4194959384UL
#endif
pwr_Class_Modbus_TCP_Slave
class pwr_Class_Modbus_TCP_Slave {
public:
pwr_tString80 Description pwr_dAlignLW;
pwr_tURL DataSheet pwr_dAlignW;
pwr_tStatus Status pwr_dAlignW;
pwr_tIoProcessMask Process pwr_dAlignW;
pwr_tObjid ThreadObject pwr_dAlignW;
pwr_tString80 Address pwr_dAlignW;
pwr_tUInt32 Port pwr_dAlignW;
pwr_tModbus_DisableEnum DisableSlave pwr_dAlignW;
pwr_tStallActionEnum StallAction pwr_dAlignW;
pwr_tBoolean ByteOrderingLE pwr_dAlignW;
pwr_tUInt16 ErrorCount pwr_dAlignW;
pwr_tUInt16 ErrorLimit pwr_dAlignW;
pwr_tUInt16 ReconnectCount pwr_dAlignW;
pwr_tUInt16 ReconnectLimit pwr_dAlignW;
pwr_tUInt16 ResponseTime pwr_dAlignW;
pwr_tFloat32 MaxTimeout pwr_dAlignW;
pwr_tYesNoEnum SingleOp pwr_dAlignW;
pwr_tUInt32 RX_packets pwr_dAlignW;
pwr_tUInt32 TX_packets pwr_dAlignW;
pwr_tUInt8 Inputs[256] pwr_dAlignW;
pwr_tUInt8 Outputs[256] pwr_dAlignW;
};
#ifndef pwr_cClass_Modbus_Module
#define pwr_cClass_Modbus_Module 4194959392UL
#endif
pwr_Class_Modbus_Module
class pwr_Class_Modbus_Module {
public:
pwr_tString80 Description pwr_dAlignLW;
pwr_tModbus_FCEnum FunctionCode pwr_dAlignW;
pwr_tUInt16 Address pwr_dAlignW;
pwr_tUInt16 UnitId pwr_dAlignW;
pwr_tModbusModule_StatusEnum Status pwr_dAlignW;
pwr_tYesNoEnum Continuous pwr_dAlignW;
pwr_tBoolean SendOp pwr_dAlignW;
pwr_tUInt32 ScanInterval pwr_dAlignW;
pwr_tIoProcessMask Process pwr_dAlignW;
pwr_tObjid ThreadObject pwr_dAlignW;
};
#ifndef pwr_cClass_Modbus_ModuleMsg
#define pwr_cClass_Modbus_ModuleMsg 4194959584UL
#endif
pwr_Class_Modbus_ModuleMsg
class pwr_Class_Modbus_ModuleMsg {
public:
pwr_tModbus_FCEnum FunctionCode pwr_dAlignLW;
pwr_tUInt16 Address pwr_dAlignW;
pwr_tUInt16 UnitId pwr_dAlignW;
pwr_tModbusModule_StatusEnum Status pwr_dAlignW;
pwr_tYesNoEnum Continuous pwr_dAlignW;
pwr_tBoolean SendOp pwr_dAlignW;
pwr_tUInt32 ScanInterval pwr_dAlignW;
};
#ifndef pwr_cClass_Modbus_ModuleReadWrite
#define pwr_cClass_Modbus_ModuleReadWrite 4194959576UL
#endif
pwr_Class_Modbus_ModuleReadWrite
class pwr_Class_Modbus_ModuleReadWrite {
public:
pwr_tString80 Description pwr_dAlignLW;
pwr_tIoProcessMask Process pwr_dAlignW;
pwr_tObjid ThreadObject pwr_dAlignW;
pwr_Class_Modbus_ModuleMsg Read pwr_dAlignLW;
pwr_Class_Modbus_ModuleMsg Write pwr_dAlignLW;
};
#ifndef pwr_cClass_Modbus_Master
#define pwr_cClass_Modbus_Master 4194959400UL
#endif
pwr_Class_Modbus_Master
class pwr_Class_Modbus_Master {
public:
pwr_tString80 Description pwr_dAlignLW;
pwr_tBoolean Disable pwr_dAlignW;
pwr_tIoProcessMask Process pwr_dAlignW;
pwr_tObjid ThreadObject pwr_dAlignW;
};
#ifndef pwr_cClass_Modbus_TCP_Server
#define pwr_cClass_Modbus_TCP_Server 4194959408UL
#endif
pwr_Class_Modbus_TCP_Server
class pwr_Class_Modbus_TCP_Server {
public:
pwr_tString80 Description pwr_dAlignLW;
pwr_tURL DataSheet pwr_dAlignW;
pwr_tStatus Status pwr_dAlignW;
pwr_tIoProcessMask Process pwr_dAlignW;
pwr_tObjid ThreadObject pwr_dAlignW;
pwr_tUInt32 Port pwr_dAlignW;
pwr_tYesNoEnum DisableServer pwr_dAlignW;
pwr_tUInt16 ErrorCount pwr_dAlignW;
pwr_tUInt16 ErrorLimit pwr_dAlignW;
pwr_tUInt32 Connections pwr_dAlignW;
pwr_tUInt32 RX_packets pwr_dAlignW;
pwr_tUInt32 TX_packets pwr_dAlignW;
pwr_tUInt8 Inputs[256] pwr_dAlignW;
pwr_tUInt8 Outputs[256] pwr_dAlignW;
};
#ifndef pwr_cClass_Modbus_TCP_ServerModule
#define pwr_cClass_Modbus_TCP_ServerModule 4194959416UL
#endif
pwr_Class_Modbus_TCP_ServerModule
class pwr_Class_Modbus_TCP_ServerModule {
public:
pwr_tString80 Description pwr_dAlignLW;
pwr_tUInt32 ReadRegAddress pwr_dAlignW;
pwr_tUInt32 WriteRegAddress pwr_dAlignW;
pwr_tUInt32 ReadDigAddress pwr_dAlignW;
pwr_tUInt32 WriteDigAddress pwr_dAlignW;
pwr_tUInt16 UnitId pwr_dAlignW;
pwr_tModbusSever_StatusEnum Status pwr_dAlignW;
pwr_tIoProcessMask Process pwr_dAlignW;
pwr_tObjid ThreadObject pwr_dAlignW;
};
#ifndef pwr_cClass_Modbus_RTU_Master
#define pwr_cClass_Modbus_RTU_Master 4194959592UL
#endif
pwr_Class_Modbus_RTU_Master
class pwr_Class_Modbus_RTU_Master {
public:
pwr_tString80 Description pwr_dAlignLW;
pwr_tBoolean Disable pwr_dAlignW;
pwr_tIoProcessMask Process pwr_dAlignW;
pwr_tObjid ThreadObject pwr_dAlignW;
pwr_tString40 Device pwr_dAlignW;
pwr_tUInt32 Speed pwr_dAlignW;
pwr_tParityEnum Parity pwr_dAlignW;
pwr_tStopBitsEnum StopBits pwr_dAlignW;
pwr_tDataBitsEnum DataBits pwr_dAlignW;
pwr_tFloat32 CharTimeout pwr_dAlignW;
pwr_tFloat32 FrameTimeout pwr_dAlignW;
pwr_tFloat32 ReceiveTimeout pwr_dAlignW;
pwr_tBoolean Debug pwr_dAlignW;
};
#ifndef pwr_cClass_Modbus_RTU_Slave
#define pwr_cClass_Modbus_RTU_Slave 4194959600UL
#endif
pwr_Class_Modbus_RTU_Slave
class pwr_Class_Modbus_RTU_Slave {
public:
pwr_tString80 Description pwr_dAlignLW;
pwr_tURL DataSheet pwr_dAlignW;
pwr_tStatus Status pwr_dAlignW;
pwr_tIoProcessMask Process pwr_dAlignW;
pwr_tObjid ThreadObject pwr_dAlignW;
pwr_tStallActionEnum StallAction pwr_dAlignW;
pwr_tYesNoEnum DisableSlave pwr_dAlignW;
pwr_tUInt16 ErrorCount pwr_dAlignW;
pwr_tUInt16 ErrorLimit pwr_dAlignW;
pwr_tUInt32 RX_packets pwr_dAlignW;
pwr_tUInt32 TX_packets pwr_dAlignW;
pwr_tUInt8 Inputs[256] pwr_dAlignW;
pwr_tUInt8 Outputs[256] pwr_dAlignW;
};
#ifndef pwr_cClass_Modbus_RTU_Module
#define pwr_cClass_Modbus_RTU_Module 4194959608UL
#endif
pwr_Class_Modbus_RTU_Module
class pwr_Class_Modbus_RTU_Module {
public:
pwr_tString80 Description pwr_dAlignLW;
pwr_tModbus_FCEnum FunctionCode pwr_dAlignW;
pwr_tUInt16 Address pwr_dAlignW;
pwr_tUInt16 UnitId pwr_dAlignW;
pwr_tModbusModule_StatusEnum Status pwr_dAlignW;
pwr_tYesNoEnum Continuous pwr_dAlignW;
pwr_tBoolean SendOp pwr_dAlignW;
pwr_tUInt32 ScanInterval pwr_dAlignW;
pwr_tIoProcessMask Process pwr_dAlignW;
pwr_tObjid ThreadObject pwr_dAlignW;
};
#ifndef pwr_cClass_Modbus_RTU_Server
#define pwr_cClass_Modbus_RTU_Server 4194959616UL
#endif
pwr_Class_Modbus_RTU_Server
class pwr_Class_Modbus_RTU_Server {
public:
pwr_tString80 Description pwr_dAlignLW;
pwr_tURL DataSheet pwr_dAlignW;
pwr_tStatus Status pwr_dAlignW;
pwr_tIoProcessMask Process pwr_dAlignW;
pwr_tObjid ThreadObject pwr_dAlignW;
pwr_tString40 Device pwr_dAlignW;
pwr_tUInt32 Speed pwr_dAlignW;
pwr_tParityEnum Parity pwr_dAlignW;
pwr_tStopBitsEnum StopBits pwr_dAlignW;
pwr_tDataBitsEnum DataBits pwr_dAlignW;
pwr_tYesNoEnum DisableServer pwr_dAlignW;
pwr_tUInt16 ErrorCount pwr_dAlignW;
pwr_tUInt16 ErrorLimit pwr_dAlignW;
pwr_tFloat32 CharTimeout pwr_dAlignW;
pwr_tFloat32 FrameTimeout pwr_dAlignW;
pwr_tUInt32 RX_packets pwr_dAlignW;
pwr_tUInt32 TX_packets pwr_dAlignW;
pwr_tUInt8 Inputs[256] pwr_dAlignW;
pwr_tUInt8 Outputs[256] pwr_dAlignW;
pwr_tBoolean Debug pwr_dAlignW;
};
#ifndef pwr_cClass_Modbus_RTU_ServerModule
#define pwr_cClass_Modbus_RTU_ServerModule 4194959624UL
#endif
pwr_Class_Modbus_RTU_ServerModule
class pwr_Class_Modbus_RTU_ServerModule {
public:
pwr_tString80 Description pwr_dAlignLW;
pwr_tUInt32 ReadAddress pwr_dAlignW;
pwr_tUInt32 WriteAddress pwr_dAlignW;
pwr_tUInt16 UnitId pwr_dAlignW;
pwr_tModbusSever_StatusEnum Status pwr_dAlignW;
pwr_tIoProcessMask Process pwr_dAlignW;
pwr_tObjid ThreadObject pwr_dAlignW;
};
#ifndef pwr_cClass_GPIO
#define pwr_cClass_GPIO 4194959424UL
#endif
pwr_Class_GPIO
class pwr_Class_GPIO {
public:
pwr_tString80 Description pwr_dAlignLW;
pwr_tIoProcessMask Process pwr_dAlignW;
pwr_tObjid ThreadObject pwr_dAlignW;
pwr_tStatus Status pwr_dAlignW;
};
#ifndef pwr_cClass_GPIO_Module
#define pwr_cClass_GPIO_Module 4194959432UL
#endif
pwr_Class_GPIO_Module
class pwr_Class_GPIO_Module {
public:
pwr_tString80 Description pwr_dAlignLW;
pwr_tIoProcessMask Process pwr_dAlignW;
pwr_tObjid ThreadObject pwr_dAlignW;
pwr_tStatus Status pwr_dAlignW;
pwr_tUInt32 ScanInterval pwr_dAlignW;
};
#ifndef pwr_cClass_OneWire
#define pwr_cClass_OneWire 4194959464UL
#endif
pwr_Class_OneWire
class pwr_Class_OneWire {
public:
pwr_tString80 Description pwr_dAlignLW;
pwr_tIoProcessMask Process pwr_dAlignW;
pwr_tObjid ThreadObject pwr_dAlignW;
pwr_tStatus Status pwr_dAlignW;
};
#ifndef pwr_cClass_Maxim_DS18B20
#define pwr_cClass_Maxim_DS18B20 4194959472UL
#endif
pwr_Class_Maxim_DS18B20
class pwr_Class_Maxim_DS18B20 : public pwr_Class_BaseIOCard {
public:
pwr_tStatus Status pwr_dAlignLW;
pwr_tUInt32 Family pwr_dAlignW;
pwr_tUInt32 Resolution pwr_dAlignW;
pwr_tUInt32 ScanInterval pwr_dAlignW;
pwr_Class_ChanAi ChAi pwr_dAlignLW;
};
#ifndef pwr_cClass_OneWire_AiDevice
#define pwr_cClass_OneWire_AiDevice 4194959560UL
#endif
pwr_Class_OneWire_AiDevice
class pwr_Class_OneWire_AiDevice : public pwr_Class_BaseIOCard {
public:
pwr_tStatus Status pwr_dAlignLW;
pwr_tUInt32 Family pwr_dAlignW;
pwr_tUInt32 Resolution pwr_dAlignW;
pwr_tUInt32 ScanInterval pwr_dAlignW;
pwr_tString256 DataFile pwr_dAlignW;
pwr_tString80 ValueSearchString pwr_dAlignW;
pwr_tFloat32 ErrorValue pwr_dAlignW;
pwr_Class_ChanAi ChAi pwr_dAlignLW;
};
#ifndef pwr_cClass_OneWire_AoDevice
#define pwr_cClass_OneWire_AoDevice 4194959632UL
#endif
pwr_Class_OneWire_AoDevice
class pwr_Class_OneWire_AoDevice : public pwr_Class_BaseIOCard {
public:
pwr_tStatus Status pwr_dAlignLW;
pwr_tUInt32 Family pwr_dAlignW;
pwr_tUInt32 Resolution pwr_dAlignW;
pwr_tUInt32 ScanInterval pwr_dAlignW;
pwr_tString256 DataFile pwr_dAlignW;
pwr_tString80 Format pwr_dAlignW;
pwr_tFloat32 ErrorValue pwr_dAlignW;
pwr_Class_ChanAo ChAo pwr_dAlignLW;
};
#ifndef pwr_cClass_USB_Agent
#define pwr_cClass_USB_Agent 4194959440UL
#endif
pwr_Class_USB_Agent
class pwr_Class_USB_Agent {
public:
pwr_tString80 Description pwr_dAlignLW;
pwr_tIoProcessMask Process pwr_dAlignW;
pwr_tObjid ThreadObject pwr_dAlignW;
pwr_tStatus Status pwr_dAlignW;
};
#ifndef pwr_cClass_Velleman_K8055
#define pwr_cClass_Velleman_K8055 4194959448UL
#endif
pwr_Class_Velleman_K8055
class pwr_Class_Velleman_K8055 {
public:
pwr_tString80 Description pwr_dAlignLW;
pwr_tIoProcessMask Process pwr_dAlignW;
pwr_tObjid ThreadObject pwr_dAlignW;
pwr_tStatus Status pwr_dAlignW;
};
#ifndef pwr_cClass_Velleman_K8055_Board
#define pwr_cClass_Velleman_K8055_Board 4194959456UL
#endif
pwr_Class_Velleman_K8055_Board
class pwr_Class_Velleman_K8055_Board : public pwr_Class_BaseIOCard {
public:
pwr_tStatus Status pwr_dAlignLW;
pwr_Class_ChanAi ChAi[2] pwr_dAlignLW;
pwr_Class_ChanDi ChDi[5] pwr_dAlignLW;
pwr_Class_ChanAo ChAo[2] pwr_dAlignLW;
pwr_Class_ChanDo ChDo[8] pwr_dAlignLW;
};
#ifndef pwr_cClass_Arduino_USB
#define pwr_cClass_Arduino_USB 4194959480UL
#endif
pwr_Class_Arduino_USB
class pwr_Class_Arduino_USB {
public:
pwr_tString80 Description pwr_dAlignLW;
pwr_tIoProcessMask Process pwr_dAlignW;
pwr_tObjid ThreadObject pwr_dAlignW;
};
#ifndef pwr_cClass_Arduino_Uno
#define pwr_cClass_Arduino_Uno 4194959488UL
#endif
pwr_Class_Arduino_Uno
class pwr_Class_Arduino_Uno {
public:
pwr_tString80 Description pwr_dAlignLW;
pwr_tString80 Specification pwr_dAlignW;
pwr_tURL DataSheet pwr_dAlignW;
pwr_tString40 Device pwr_dAlignW;
pwr_tIoProcessMask Process pwr_dAlignW;
pwr_tObjid ThreadObject pwr_dAlignW;
pwr_tUInt32 ErrorCount pwr_dAlignW;
pwr_tUInt32 ErrorSoftLimit pwr_dAlignW;
pwr_tUInt32 ErrorHardLimit pwr_dAlignW;
pwr_tArduino_StatusEnum Status pwr_dAlignW;
pwr_tFloat32 WatchdogTime pwr_dAlignW;
pwr_tArduino_BaudRateEnum BaudRate pwr_dAlignW;
pwr_tArduino_OptionsMask Options pwr_dAlignW;
pwr_tUInt32 AiScanInterval pwr_dAlignW;
pwr_tUInt32 AoScanInterval pwr_dAlignW;
pwr_tStallActionEnum StallAction pwr_dAlignW;
pwr_tFloat32 Timeout pwr_dAlignW;
pwr_tString132 FirmwareVersion pwr_dAlignW;
};
#ifndef pwr_cClass_Hilscher_cifX_Diag
#define pwr_cClass_Hilscher_cifX_Diag 4194959520UL
#endif
pwr_Class_Hilscher_cifX_Diag
class pwr_Class_Hilscher_cifX_Diag {
public:
pwr_tUInt32 DeviceNumber pwr_dAlignLW;
pwr_tUInt32 SerialNumber pwr_dAlignW;
pwr_tString40 FirmwareName pwr_dAlignW;
pwr_tString40 FirmwareVersion pwr_dAlignW;
pwr_tUInt32 SystemError pwr_dAlignW;
pwr_tUInt32 SystemStatus pwr_dAlignW;
pwr_tDeltaTime TimeSinceStart pwr_dAlignLW;
pwr_tFloat32 CpuLoad pwr_dAlignW;
pwr_tHilscher_cifX_CommStateEnum CommState pwr_dAlignW;
pwr_tUInt32 CommError pwr_dAlignW;
pwr_tUInt32 ErrorCount pwr_dAlignW;
pwr_tUInt32 ConfigSlaves pwr_dAlignW;
pwr_tUInt32 ActiveSlaves pwr_dAlignW;
pwr_tHilscher_cifX_SlaveStateEnum SlaveState pwr_dAlignW;
pwr_tReadyNotReadyEnum HostState pwr_dAlignW;
pwr_tOnOffEnum BusState pwr_dAlignW;
};
#ifndef pwr_cClass_Hilscher_cifX_PnController
#define pwr_cClass_Hilscher_cifX_PnController 4194959552UL
#endif
pwr_Class_Hilscher_cifX_PnController
class pwr_Class_Hilscher_cifX_PnController {
public:
pwr_tString80 Description pwr_dAlignLW;
pwr_tString80 Specification pwr_dAlignW;
pwr_tURL DataSheet pwr_dAlignW;
pwr_tString32 IP_Address pwr_dAlignW;
pwr_tString40 SubnetMask pwr_dAlignW;
pwr_tString40 DeviceName pwr_dAlignW;
pwr_tString40 DeviceType pwr_dAlignW;
pwr_tString40 Alias pwr_dAlignW;
pwr_tUInt32 Channel pwr_dAlignW;
pwr_tUInt32 Status pwr_dAlignW;
pwr_tIoProcessMask Process pwr_dAlignW;
pwr_tObjid ThreadObject pwr_dAlignW;
pwr_tUInt32 ErrorCount pwr_dAlignW;
pwr_tString80 ErrorStr pwr_dAlignW;
pwr_tUInt32 ErrorSoftLimit pwr_dAlignW;
pwr_tUInt32 ErrorHardLimit pwr_dAlignW;
pwr_Class_Hilscher_cifX_Diag Diag pwr_dAlignLW;
};
#ifndef pwr_cClass_Hilscher_cifX_Master
#define pwr_cClass_Hilscher_cifX_Master 4194959496UL
#endif
pwr_Class_Hilscher_cifX_Master
class pwr_Class_Hilscher_cifX_Master {
public:
pwr_tString80 Description pwr_dAlignLW;
pwr_tString80 Specification pwr_dAlignW;
pwr_tURL DataSheet pwr_dAlignW;
pwr_tString40 Alias pwr_dAlignW;
pwr_tUInt32 Channel pwr_dAlignW;
pwr_tUInt32 Status pwr_dAlignW;
pwr_tIoProcessMask Process pwr_dAlignW;
pwr_tObjid ThreadObject pwr_dAlignW;
pwr_tUInt32 ErrorCount pwr_dAlignW;
pwr_tString80 ErrorStr pwr_dAlignW;
pwr_tUInt32 ErrorSoftLimit pwr_dAlignW;
pwr_tUInt32 ErrorHardLimit pwr_dAlignW;
pwr_Class_Hilscher_cifX_Diag Diag pwr_dAlignLW;
};
#ifndef pwr_cClass_Hilscher_cifX_Device
#define pwr_cClass_Hilscher_cifX_Device 4194959504UL
#endif
pwr_Class_Hilscher_cifX_Device
class pwr_Class_Hilscher_cifX_Device {
public:
pwr_tString80 Description pwr_dAlignLW;
pwr_tByteOrderingEnum ByteOrdering pwr_dAlignW;
pwr_tFloatRepEnum FloatRepresentation pwr_dAlignW;
pwr_tIoProcessMask Process pwr_dAlignW;
pwr_tObjid ThreadObject pwr_dAlignW;
pwr_tUInt32 InputAreaOffset pwr_dAlignW;
pwr_tUInt32 InputAreaSize pwr_dAlignW;
pwr_tUInt32 OutputAreaOffset pwr_dAlignW;
pwr_tUInt32 OutputAreaSize pwr_dAlignW;
};
#ifndef pwr_cClass_Hilscher_cifX_Module
#define pwr_cClass_Hilscher_cifX_Module 4194959512UL
#endif
pwr_Class_Hilscher_cifX_Module
class pwr_Class_Hilscher_cifX_Module {
public:
pwr_tString80 Description pwr_dAlignLW;
pwr_tIoProcessMask Process pwr_dAlignW;
pwr_tObjid ThreadObject pwr_dAlignW;
pwr_tUInt32 InputAreaOffset pwr_dAlignW;
pwr_tUInt32 InputAreaSize pwr_dAlignW;
pwr_tUInt32 OutputAreaOffset pwr_dAlignW;
pwr_tUInt32 OutputAreaSize pwr_dAlignW;
};
#ifndef pwr_cClass_USB_Joystick
#define pwr_cClass_USB_Joystick 4194959528UL
#endif
pwr_Class_USB_Joystick
class pwr_Class_USB_Joystick {
public:
pwr_tString80 Description pwr_dAlignLW;
pwr_tString80 Specification pwr_dAlignW;
pwr_tURL DataSheet pwr_dAlignW;
pwr_tString40 Device pwr_dAlignW;
pwr_tIoProcessMask Process pwr_dAlignW;
pwr_tObjid ThreadObject pwr_dAlignW;
pwr_tUInt32 ErrorCount pwr_dAlignW;
pwr_tUInt32 ErrorSoftLimit pwr_dAlignW;
pwr_tUInt32 ErrorHardLimit pwr_dAlignW;
pwr_tUInt32 Status pwr_dAlignW;
};
#ifndef pwr_cClass_CodeMerc_JoyWarriorA3B8
#define pwr_cClass_CodeMerc_JoyWarriorA3B8 4194959536UL
#endif
pwr_Class_CodeMerc_JoyWarriorA3B8
class pwr_Class_CodeMerc_JoyWarriorA3B8 : public pwr_Class_USB_Joystick {
public:
pwr_Class_ChanAi AiX pwr_dAlignLW;
pwr_Class_ChanAi AiY pwr_dAlignLW;
pwr_Class_ChanAi AiZ pwr_dAlignLW;
pwr_Class_ChanDi Di1 pwr_dAlignLW;
pwr_Class_ChanDi Di2 pwr_dAlignLW;
pwr_Class_ChanDi Di3 pwr_dAlignLW;
pwr_Class_ChanDi Di4 pwr_dAlignLW;
pwr_Class_ChanDi Di5 pwr_dAlignLW;
pwr_Class_ChanDi Di6 pwr_dAlignLW;
pwr_Class_ChanDi Di7 pwr_dAlignLW;
pwr_Class_ChanDi Di8 pwr_dAlignLW;
};
#ifndef pwr_cClass_UDP_IO
#define pwr_cClass_UDP_IO 4194959544UL
#endif
pwr_Class_UDP_IO
class pwr_Class_UDP_IO {
public:
pwr_tString80 Description pwr_dAlignLW;
pwr_tIoProcessMask Process pwr_dAlignW;
pwr_tObjid ThreadObject pwr_dAlignW;
pwr_tString32 Device pwr_dAlignW;
pwr_tString40 RemoteHostName pwr_dAlignW;
pwr_tString40 RemoteAddress pwr_dAlignW;
pwr_tUInt32 RemotePort pwr_dAlignW;
pwr_tUInt32 LocalPort pwr_dAlignW;
pwr_tByteOrderingEnum ByteOrdering pwr_dAlignW;
pwr_tFloatRepEnum FloatRepresentation pwr_dAlignW;
pwr_tUpDownEnum Link pwr_dAlignW;
pwr_tFloat32 LinkTimeout pwr_dAlignW;
pwr_tFloat32 ReconnectTime pwr_dAlignW;
pwr_tStatus Status pwr_dAlignW;
pwr_tUInt32 RX_Packets pwr_dAlignW;
pwr_tUInt32 TX_Packets pwr_dAlignW;
pwr_tBoolean EnableHeader pwr_dAlignW;
pwr_tUInt16 MessageId[2] pwr_dAlignW;
pwr_tBoolean UseKeepAlive pwr_dAlignW;
pwr_tFloat32 KeepAliveTime pwr_dAlignW;
pwr_tInt32 KeepAliveDiff pwr_dAlignW;
pwr_tUInt32 ErrorCount pwr_dAlignW;
pwr_tUInt32 ErrorSoftLimit pwr_dAlignW;
pwr_tUInt32 ErrorHardLimit pwr_dAlignW;
pwr_tUInt32 InputAreaSize pwr_dAlignW;
pwr_tUInt32 OutputAreaSize pwr_dAlignW;
};
#ifndef pwr_cClass_SPI_Master
#define pwr_cClass_SPI_Master 4194959640UL
#endif
pwr_Class_SPI_Master
class pwr_Class_SPI_Master : public pwr_Class_BaseIORack {
public:
};
#ifndef pwr_cClass_SPI_Slave
#define pwr_cClass_SPI_Slave 4194959568UL
#endif
pwr_Class_SPI_Slave
class pwr_Class_SPI_Slave {
public:
pwr_tString80 Description pwr_dAlignLW;
pwr_tIoProcessMask Process pwr_dAlignW;
pwr_tObjid ThreadObject pwr_dAlignW;
pwr_tString32 Device pwr_dAlignW;
pwr_tSPI_ModeEnum Mode pwr_dAlignW;
pwr_tUInt32 BitsPerWord pwr_dAlignW;
pwr_tBoolean LSB_First pwr_dAlignW;
pwr_tUInt32 MaxSpeed pwr_dAlignW;
pwr_tByteOrderingEnum ByteOrdering pwr_dAlignW;
pwr_tFloatRepEnum FloatRepresentation pwr_dAlignW;
pwr_tStatus Status pwr_dAlignW;
pwr_tUInt32 ErrorCount pwr_dAlignW;
pwr_tUInt32 ErrorSoftLimit pwr_dAlignW;
pwr_tUInt32 ErrorHardLimit pwr_dAlignW;
pwr_tUInt32 InputAreaSize pwr_dAlignW;
pwr_tUInt32 OutputAreaSize pwr_dAlignW;
};
#ifndef pwr_cClass_Nodave_PLC
#define pwr_cClass_Nodave_PLC 4194959648UL
#endif
pwr_Class_Nodave_PLC
class pwr_Class_Nodave_PLC {
public:
pwr_tString80 Description pwr_dAlignLW;
pwr_tString80 Status pwr_dAlignW;
pwr_tIoProcessMask Process pwr_dAlignW;
pwr_tObjid ThreadObject pwr_dAlignW;
pwr_tNodave_ConnectionEnum Connection pwr_dAlignW;
pwr_tString40 SerialDevice pwr_dAlignW;
pwr_tUInt32 SerialSpeed pwr_dAlignW;
pwr_tParityEnum SerialParity pwr_dAlignW;
pwr_tUInt32 Port pwr_dAlignW;
pwr_tString40 IP_Address pwr_dAlignW;
pwr_tNodave_ProtocolEnum Protocol pwr_dAlignW;
pwr_tNodave_SpeedEnum Speed pwr_dAlignW;
pwr_tInt32 MPI_Address pwr_dAlignW;
pwr_tInt32 MPI_Local pwr_dAlignW;
pwr_tInt32 Rack pwr_dAlignW;
pwr_tInt32 Slot pwr_dAlignW;
pwr_tByteOrderingEnum ByteOrdering pwr_dAlignW;
pwr_tFloatRepEnum FloatRepresentation pwr_dAlignW;
pwr_tFloat32 Timeout pwr_dAlignW;
pwr_tStallActionEnum StallAction pwr_dAlignW;
pwr_tUInt32 ErrorCount pwr_dAlignW;
pwr_tUInt32 ErrorLimit pwr_dAlignW;
pwr_tUInt32 Debug pwr_dAlignW;
pwr_tUInt8 Inputs[200] pwr_dAlignW;
pwr_tUInt8 Outputs[200] pwr_dAlignW;
};
#ifndef pwr_cClass_Nodave_Transaction
#define pwr_cClass_Nodave_Transaction 4194959656UL
#endif
pwr_Class_Nodave_Transaction
class pwr_Class_Nodave_Transaction {
public:
pwr_tString80 Description pwr_dAlignLW;
pwr_tString80 Status pwr_dAlignW;
pwr_tIoProcessMask Process pwr_dAlignW;
pwr_tObjid ThreadObject pwr_dAlignW;
pwr_tNodave_AreaEnum Area pwr_dAlignW;
pwr_tUInt32 DataBlock pwr_dAlignW;
pwr_tUInt32 Address pwr_dAlignW;
pwr_tUInt32 ScanInterval pwr_dAlignW;
pwr_tYesNoEnum Continuous pwr_dAlignW;
pwr_tBoolean SendOp pwr_dAlignW;
};
#ifndef pwr_cClass_Epl_Module
#define pwr_cClass_Epl_Module 4194959664UL
#endif
pwr_Class_Epl_Module
class pwr_Class_Epl_Module {
public:
pwr_tString80 Description pwr_dAlignLW;
pwr_tString80 Specification pwr_dAlignW;
pwr_tURL DataSheet pwr_dAlignW;
pwr_tIoProcessMask Process pwr_dAlignW;
pwr_tObjid ThreadObject pwr_dAlignW;
pwr_tUInt32 InputAreaOffset pwr_dAlignW;
pwr_tUInt32 InputAreaSize pwr_dAlignW;
pwr_tUInt32 OutputAreaOffset pwr_dAlignW;
pwr_tUInt32 OutputAreaSize pwr_dAlignW;
};
#ifndef pwr_cClass_Epl_CN
#define pwr_cClass_Epl_CN 4194959672UL
#endif
pwr_Class_Epl_CN
class pwr_Class_Epl_CN {
public:
pwr_tString80 Description pwr_dAlignLW;
pwr_tString80 Specification pwr_dAlignW;
pwr_tURL DataSheet pwr_dAlignW;
pwr_tUInt16 NodeId pwr_dAlignW;
pwr_tEplNmtState NmtState pwr_dAlignW;
pwr_tStatus Status pwr_dAlignW;
pwr_tIoProcessMask Process pwr_dAlignW;
pwr_tObjid ThreadObject pwr_dAlignW;
pwr_tStallActionEnum StallAction pwr_dAlignW;
pwr_tUInt16 Timeout pwr_dAlignW;
pwr_tUInt16 ErrorCount pwr_dAlignW;
pwr_tUInt16 ErrorSoftLimit pwr_dAlignW;
pwr_tUInt16 ErrorHardLimit pwr_dAlignW;
pwr_tByteOrderingEnum ByteOrdering pwr_dAlignW;
pwr_tUInt32 InputAreaOffset pwr_dAlignW;
pwr_tUInt32 InputAreaSize pwr_dAlignW;
pwr_tUInt32 OutputAreaOffset pwr_dAlignW;
pwr_tUInt32 OutputAreaSize pwr_dAlignW;
};
#ifndef pwr_cClass_Epl_MN
#define pwr_cClass_Epl_MN 4194959680UL
#endif
pwr_Class_Epl_MN
class pwr_Class_Epl_MN {
public:
pwr_tString80 Description pwr_dAlignLW;
pwr_tString80 Specification pwr_dAlignW;
pwr_tString256 CDCfile pwr_dAlignW;
pwr_tString80 Device pwr_dAlignW;
pwr_tString80 IpAddress pwr_dAlignW;
pwr_tString80 IpNetmask pwr_dAlignW;
pwr_tUInt16 NodeId pwr_dAlignW;
pwr_tIoProcessMask Process pwr_dAlignW;
pwr_tObjid ThreadObject pwr_dAlignW;
pwr_tStallActionEnum StallAction pwr_dAlignW;
pwr_tUInt32 Priority pwr_dAlignW;
pwr_tUInt16 StartupTimeout pwr_dAlignW;
pwr_tUInt16 Timeout pwr_dAlignW;
pwr_tEplNmtState NmtState pwr_dAlignW;
pwr_tStatus Status pwr_dAlignW;
pwr_tUInt16 ErrorCount pwr_dAlignW;
pwr_tUInt16 ErrorSoftLimit pwr_dAlignW;
pwr_tUInt16 ErrorHardLimit pwr_dAlignW;
pwr_tUInt32 InputAreaSize pwr_dAlignW;
pwr_tUInt32 OutputAreaSize pwr_dAlignW;
pwr_tUInt16 NumberOfSlaves pwr_dAlignW;
};
#ifndef pwr_cClass_Epl_CNServer
#define pwr_cClass_Epl_CNServer 4194959704UL
#endif
pwr_Class_Epl_CNServer
class pwr_Class_Epl_CNServer {
public:
pwr_tString80 Description pwr_dAlignLW;
pwr_tString80 Device pwr_dAlignW;
pwr_tString80 IpAddress pwr_dAlignW;
pwr_tString80 IpNetmask pwr_dAlignW;
pwr_tUInt16 NodeId pwr_dAlignW;
pwr_tIoProcessMask Process pwr_dAlignW;
pwr_tObjid ThreadObject pwr_dAlignW;
pwr_tStallActionEnum StallAction pwr_dAlignW;
pwr_tUInt32 Priority pwr_dAlignW;
pwr_tUInt16 StartupTimeout pwr_dAlignW;
pwr_tUInt16 Timeout pwr_dAlignW;
pwr_tEplNmtState NmtState pwr_dAlignW;
pwr_tStatus Status pwr_dAlignW;
pwr_tUInt16 ErrorCount pwr_dAlignW;
pwr_tUInt16 ErrorSoftLimit pwr_dAlignW;
pwr_tUInt16 ErrorHardLimit pwr_dAlignW;
pwr_tUInt32 InputAreaSize pwr_dAlignW;
pwr_tUInt32 OutputAreaSize pwr_dAlignW;
};
#ifndef pwr_cClass_Epl_CNServerModule
#define pwr_cClass_Epl_CNServerModule 4194959712UL
#endif
pwr_Class_Epl_CNServerModule
class pwr_Class_Epl_CNServerModule {
public:
pwr_tString80 Description pwr_dAlignLW;
pwr_tString80 Specification pwr_dAlignW;
pwr_tURL DataSheet pwr_dAlignW;
pwr_tIoProcessMask Process pwr_dAlignW;
pwr_tObjid ThreadObject pwr_dAlignW;
pwr_tUInt32 InputAreaOffset pwr_dAlignW;
pwr_tUInt32 InputAreaSize pwr_dAlignW;
pwr_tUInt32 OutputAreaOffset pwr_dAlignW;
pwr_tUInt32 OutputAreaSize pwr_dAlignW;
};
#ifndef pwr_cClass_EplHandler
#define pwr_cClass_EplHandler 4194959688UL
#endif
pwr_Class_EplHandler
class pwr_Class_EplHandler {
public:
pwr_tFloat32 CycleTime pwr_dAlignLW;
};
#ifndef pwr_cClass_PiFace_Digital
#define pwr_cClass_PiFace_Digital 4194959720UL
#endif
pwr_Class_PiFace_Digital
class pwr_Class_PiFace_Digital {
public:
pwr_tString80 Description pwr_dAlignLW;
pwr_tIoProcessMask Process pwr_dAlignW;
pwr_tObjid ThreadObject pwr_dAlignW;
pwr_tStatus Status pwr_dAlignW;
pwr_tUInt32 ScanInterval pwr_dAlignW;
pwr_Class_ChanDi ChDi[8] pwr_dAlignLW;
pwr_Class_ChanDo ChDo[8] pwr_dAlignLW;
};
#ifndef pwr_cClass_Gertboard
#define pwr_cClass_Gertboard 4194959728UL
#endif
pwr_Class_Gertboard
class pwr_Class_Gertboard {
public:
pwr_tString80 Description pwr_dAlignLW;
pwr_tIoProcessMask Process pwr_dAlignW;
pwr_tObjid ThreadObject pwr_dAlignW;
pwr_tStatus Status pwr_dAlignW;
pwr_Class_ChanD Buf1 pwr_dAlignLW;
pwr_Class_ChanD Buf2 pwr_dAlignLW;
pwr_Class_ChanD Buf3 pwr_dAlignLW;
pwr_Class_ChanD Buf4 pwr_dAlignLW;
pwr_Class_ChanD Buf5 pwr_dAlignLW;
pwr_Class_ChanD Buf6 pwr_dAlignLW;
pwr_Class_ChanD Buf7 pwr_dAlignLW;
pwr_Class_ChanD Buf8 pwr_dAlignLW;
pwr_Class_ChanD Buf9 pwr_dAlignLW;
pwr_Class_ChanD Buf10 pwr_dAlignLW;
pwr_Class_ChanD Buf11 pwr_dAlignLW;
pwr_Class_ChanD Buf12 pwr_dAlignLW;
pwr_Class_ChanAi AD0 pwr_dAlignLW;
pwr_Class_ChanAi AD1 pwr_dAlignLW;
pwr_Class_ChanAo DA0 pwr_dAlignLW;
pwr_Class_ChanAo DA1 pwr_dAlignLW;
};
#ifndef pwr_cClass_MQTT_Client
#define pwr_cClass_MQTT_Client 4194959736UL
#endif
pwr_Class_MQTT_Client
class pwr_Class_MQTT_Client {
public:
pwr_tString80 Description pwr_dAlignLW;
pwr_tIoProcessMask Process pwr_dAlignW;
pwr_tObjid ThreadObject pwr_dAlignW;
pwr_tStatus Status pwr_dAlignW;
pwr_tString80 Server pwr_dAlignW;
pwr_tUInt32 Port pwr_dAlignW;
pwr_tString40 User pwr_dAlignW;
pwr_tString40 Password pwr_dAlignW;
pwr_tString80 SubscribeTopic pwr_dAlignW;
};
#ifndef pwr_cClass_MQTT_Device
#define pwr_cClass_MQTT_Device 4194959744UL
#endif
pwr_Class_MQTT_Device
class pwr_Class_MQTT_Device {
public:
pwr_tString80 Description pwr_dAlignLW;
pwr_tString80 Specification pwr_dAlignW;
pwr_tMQTT_MsgFormat MessageFormat pwr_dAlignW;
pwr_tString80 SubscribeTopic pwr_dAlignW;
pwr_tString80 PublishTopic pwr_dAlignW;
pwr_tIoProcessMask Process pwr_dAlignW;
pwr_tObjid ThreadObject pwr_dAlignW;
pwr_tStallActionEnum StallAction pwr_dAlignW;
pwr_tUInt16 ErrorCount pwr_dAlignW;
pwr_tUInt16 ErrorSoftLimit pwr_dAlignW;
pwr_tUInt16 ErrorHardLimit pwr_dAlignW;
pwr_tUInt32 PublishCount pwr_dAlignW;
pwr_tUInt32 SubscribeCount pwr_dAlignW;
};
#endif